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flash_player-2008920201813708
- 实现wav解码,用VHDL编写,在quarters下运行,用于FPGA,CPLD稍作修改也可用-Wav decoder implementation using VHDL written to run in the quarters for the FPGA, CPLD some slight modifications can also be used
Chapter11-13
- 第十一章到第十三章的代码 本书通过100多个模块实例,详细地讲解了Verilog HDL程序设计语言,全书共分13章,内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等,实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个
juanjicoder
- 卷积码是一种性能优良的差错控制编码。本文在阐述卷积码编解码器基本工作原理的基础上, 提出了在MAX+ P lusÊ 开发平台上基于VHDL 语言设计(2, 1, 6) 卷积码编解码器的方法。仿真实验结果表明了该编解码器的正确性和合 理性。-juanjicoder
B_to_D
- 二进制转BCD码程序,可作为7段数码管显示的编解码程序,VHDL编写的FPGA工程。-BCD binary code change process, as 7 digital display codec process, VHDL FPGA project prepared.
communications_2
- 用vhdl代码描述的通信系统仿真程序。包括信源(20位m序列),crc编码(采用串行算法),加噪(用22位m序列产生稀疏的1,然后和编码后的数据异或),crc解码,数据串行输出。 -Vhdl code with the simulation program described in the communication system. Including the source (20 m sequence), crc code (using the serial algorithm), no
tc9012
- 用vhdl编写的实现常用红外遥控芯片(tc9012)解码的程序,调试已通过-Vhdl implementation written in common with the infrared remote control chip (tc9012) decoding process, debugging has passed
Decoder
- 一个解码器小程序,FPGA程序,用VHDL语言编写的源程序-failed to translate
HDB3(2)
- 利用vhdl编写 实现数字基带传输HDB3码解码程序-vhdl hdb3 decode
code
- 详细的解析加代码,是用VHDL写的编码器与解码器的简单应用 -Plus detailed analysis code is written in VHDL encoder and decoder, a simple application
8b10b_dec
- vhdl语言编写,8b10b解码器模块设计-vhdl language, 8b10b Decoder Module
8b10b_enc
- vhdl语言编写,8b10b解码器模块设计-vhdl language, 8b10b Decoder Module
DC
- 汉明码的解码电路,用VHDL实现,可以用于FPGA仿真-Hamming code decoding circuit, VHDL implementation, can be used for FPGA simulation
CRC_Check
- crc校验的vhdl验证,模块分为编码组帧解帧解码模块-vhdl crc checksum verification, the module is divided into coding frame decoding module framing solution
altera_lib
- 实现基于VHDL语言的8b10b编解码器,在altera平台得到验证。-8b10b VHDL language-based codec, in altera platform to be validated.
MI
- PS2的键盘解码和led灯显示解码的联合,适合初学者,VHDL程序-PS2 keyboard decoding and joint decoding led light display, suitable for beginners, VHDL program
24
- 2-4解码器的vhdl描述,行为域的描述,-24 decode
jiemaqi
- 基于FPGA的数字解码器的的vhdl代码-FPGA-based digital decoder in vhdl code
8b10b
- 8b/10b编解码模块,VHDL语言设计,经过编译,里面有测试平台以及文档。不可错过哦!-The 8b/10b encoding and decoding modules, VHDL language design, compilation, there are test platforms, and documentation. Not miss it!
IIR_VerilogHDL
- 实现IIR红外解码的VHDL,通过遥控器遥控来发射红外线,FPGA接收到后进行解码并显示在数码管上面-a verilogHDL example to control IIR
mancheshitebianjiema
- 用VHDL编写的曼切斯特编解码,适用于以太网上流行的基带传输数字编码。-Manchester encoding and decoding written using VHDL, popular Ethernet baseband transmission of digital coding.